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| learn:programmable-logic:tutorials:use-flip-flops-to-build-a-clock-divider:start [2016/07/22 19:49] – Martha | learn:programmable-logic:tutorials:use-flip-flops-to-build-a-clock-divider:start [2017/10/24 21:27] – Arthur Brown | ||
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| ====== Use Flip-flops to Build a Clock Divider ====== | ====== Use Flip-flops to Build a Clock Divider ====== | ||
| - | A flip-flip is an edge-triggered memory circuit. In this project, we will implement a flip-flop behaviorally using Verilog, and use several flip-flops to create a clock divider that blinks LEDs. | + | A flip-flop is an edge-triggered memory circuit. In this project, we will implement a flip-flop behaviorally using Verilog, and use several flip-flops to create a clock divider that blinks LEDs. |
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| - Can you add two switches to control how fast the LED blinks: Say, if switch[1:0] is 0, LED blink frequency is 0.745 Hz; if switch[1:0] is 1, LED blink frequency is 1.49 Hz; if switch[1:0] is 2, LED blink frequency is 2.98 Hz; if switch[1:0] is 3, LED blink frequency is 5.96 Hz. | - Can you add two switches to control how fast the LED blinks: Say, if switch[1:0] is 0, LED blink frequency is 0.745 Hz; if switch[1:0] is 1, LED blink frequency is 1.49 Hz; if switch[1:0] is 2, LED blink frequency is 2.98 Hz; if switch[1:0] is 3, LED blink frequency is 5.96 Hz. | ||
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