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start [2019/07/09 19:53] Arthur Brown |
start [2020/06/22 08:49] (current) Vicentiu Neagoe |
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| - | ====== Digilent Documentation ====== | + | ======= Digilent Documentation ======= |
| | | ||
| Welcome to the Digilent Wiki system. | Welcome to the Digilent Wiki system. | ||
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| * [[CoolRunner-II:CoolRunner-II|CoolRunner-II]] | * [[CoolRunner-II:CoolRunner-II|CoolRunner-II]] | ||
| * [[reference:programmable-logic:cora-z7:start|Cora Z7]] | * [[reference:programmable-logic:cora-z7:start|Cora Z7]] | ||
| + | * [[:reference:programmable-logic:eclypse-z7:start|Eclypse Z7]] | ||
| * [[Genesys:start]]-- This has been replaced by [[genesys2:genesys2|Genesys 2]] | * [[Genesys:start]]-- This has been replaced by [[genesys2:genesys2|Genesys 2]] | ||
| * [[genesys2:genesys2|Genesys 2]] | * [[genesys2:genesys2|Genesys 2]] | ||
| + | * [[:reference:programmable-logic:genesys-zu:start|Genesys ZU]] | ||
| * [[:reference:programmable-logic:nexys-a7:start|Nexys A7]] | * [[:reference:programmable-logic:nexys-a7:start|Nexys A7]] | ||
| * [[nexys:nexys2:nexys2|Nexys 2]]-- Due to the Micron Memory EOL we have migrated this product to [[nexys4-ddr:start|Nexys 4 DDR]] | * [[nexys:nexys2:nexys2|Nexys 2]]-- Due to the Micron Memory EOL we have migrated this product to [[nexys4-ddr:start|Nexys 4 DDR]] | ||
| Line 113: | Line 115: | ||
| * [[sume:sume|NetFPGA-SUME]] | * [[sume:sume|NetFPGA-SUME]] | ||
| * [[S3E:S3E|Spartan 3E Starter Board]] | * [[S3E:S3E|Spartan 3E Starter Board]] | ||
| + | * [[reference:programmable-logic:usb104a7:start|USB104 A7]] | ||
| * [[Virtex-5:Virtex-5|Virtex-5 OpenSPARC Evaluation Platform]] | * [[Virtex-5:Virtex-5|Virtex-5 OpenSPARC Evaluation Platform]] | ||
| * [[Virtex-II:Virtex-II|XUP Virtex-II Pro Development System]] | * [[Virtex-II:Virtex-II|XUP Virtex-II Pro Development System]] | ||
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| * [[textbooks:digital_design|Digital Design Using Digilent FPGA Boards]] | * [[textbooks:digital_design|Digital Design Using Digilent FPGA Boards]] | ||
| + | ===== Zmod™ ===== | ||
| + | |||
| + | The Zmod™ family is Digilent's line of peripheral modules that conform to Opal Kelly's [[https://syzygyfpga.io/|SYZYGY specification]]. Zmods are interface boards that offer modular high-speed I/O capabilities to compatible FPGA host boards.\\ | ||
| + | |||
| + | * [[:reference:zmod:zmodadc:start|Zmod ADC]] | ||
| + | * [[:reference:zmod:zmoddac:start|Zmod DAC]] | ||
| ===== Pmod™ ===== | ===== Pmod™ ===== | ||
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| ^ [[learn:fundamentals:communication-protocols:spi:start|SPI]] ^ [[learn:fundamentals:communication-protocols:uart:start|UART]] ^ [[learn:fundamentals:communication-protocols:i2c:start|I²C]] ^ [[learn:fundamentals:communication-protocols:gpio:start|GPIO]] ^ | ^ [[learn:fundamentals:communication-protocols:spi:start|SPI]] ^ [[learn:fundamentals:communication-protocols:uart:start|UART]] ^ [[learn:fundamentals:communication-protocols:i2c:start|I²C]] ^ [[learn:fundamentals:communication-protocols:gpio:start|GPIO]] ^ | ||
| | {{topic>pmod-spi -user-guide}} | {{topic>pmod-uart -user-guide}} | {{topic>pmod-i2c -user-guide}} | {{topic>pmod-gpio -user-guide}} | | | {{topic>pmod-spi -user-guide}} | {{topic>pmod-uart -user-guide}} | {{topic>pmod-i2c -user-guide}} | {{topic>pmod-gpio -user-guide}} | | ||
| + | |||
| + | /* Test of code taken verbatim from the Pmod home page; https://reference.digilentinc.com/reference/pmod/start | ||
| + | {{Digilent Product List | ||
| + | | Product Namespace = reference:pmods | ||
| + | | Image = True | ||
| + | | Name = True | ||
| + | | Column = Bus | ||
| + | | Column = Logic Level | ||
| + | | Column = Specification Version | ||
| + | }} | ||
| + | */ | ||
| + | |||
| /*^ List of Pmods by Communication Protocol |||| | /*^ List of Pmods by Communication Protocol |||| | ||
