Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
reference:programmable-logic:arty-s7:reference-manual [2018/07/09 22:58]
Arthur Brown
reference:programmable-logic:arty-s7:reference-manual [2018/07/13 18:52] (current)
James Colvin [9 Arduino/chipKIT Shield Connector]
Line 335: Line 335:
 ===== 9 Arduino/​chipKIT Shield Connector ===== ===== 9 Arduino/​chipKIT Shield Connector =====
  
-The Arty S7 can be connected to standard Arduino and chipKIT shields to add extended functionality. Special care was taken while designing the Arty S7 to make sure it is compatible with the majority of Arduino and chipKIT shields on the market. The shield connector has 45 pins connected to the FPGA for general purpose Digital I/O. Due to the flexibility of FPGAs, it is possible to use these pins for just about anything including digital read/write, SPI connections,​ UART connections,​ I2C connections,​ and PWM. Six of these pins (labeled AN0-AN5) can also be used as single-ended analog inputs with an input range of 0V-3.3V, and another four (labeled AN6-9) can be used as differential analog input pairs with an input range of 0V-1.0V. The Arty S7's shield connector is implemented on headers J1, J3, J4J7, and J8. For more information on how the shield connector pins are connected to the FPGA, refer to the Arty S7 schematic and master XDC file, available through the [[start|Arty S7 Resource Center]].+The Arty S7 can be connected to standard Arduino and chipKIT shields to add extended functionality. Special care was taken while designing the Arty S7 to make sure it is compatible with the majority of Arduino and chipKIT shields on the market. The shield connector has 45 pins connected to the FPGA for general purpose Digital I/O. Due to the flexibility of FPGAs, it is possible to use these pins for just about anything including digital read/write, SPI connections,​ UART connections,​ I2C connections,​ and PWM. Six of these pins (labeled AN0-AN5) can also be used as single-ended analog inputs with an input range of 0V-3.3V, and another four (labeled AN6-9) can be used as differential analog input pairs with an input range of 0V-1.0V. The Arty S7's shield connector is implemented on headers J1, J2, J3, J5J6, and J8. For more information on how the shield connector pins are connected to the FPGA, refer to the Arty S7 schematic and master XDC file, available through the [[start|Arty S7 Resource Center]].
  
 **Note: The Arty S7 is not compatible with shields that output 5V digital or analog signals. Driving pins on the Arty S7 shield connector above 5V may cause damage to the FPGA.** ​ **Note: The Arty S7 is not compatible with shields that output 5V digital or analog signals. Driving pins on the Arty S7 shield connector above 5V may cause damage to the FPGA.** ​