Pmod CDC1 Reference Manual
The Digilent Pmod CDC1 (Revision B) demonstrates capacitative-to-digital conversion through the use of Analog Devices AD7156. With its high input sensitivity and adaptive threshold capability, this Pmod is able to easily handle variance in environmental changes while still reporting accurate information.
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- Two capacitive input channels
- Fixed or adaptive threshold capability
- High sensitivity up to 3 fF
- 2×4-pin connector with I2C interface
The Pmod CDC1 utilizes a 12-bit capacitance-to-digital converter (CDC) to determine if the measured capacitance on a particular channel (conveniently labeled as BTN1 and BTN2 on the Pmod surface) is above, below, inside, or outside the user definable threshold level(s). Users are able to read the digital capacitance level on the most recently converted channel through I2C or can simply use the output pins on header J2 if they are only interested in knowing if a threshold has been crossed or not.
Interfacing with the Pmod
The Pmod CDC1 communicates with the host board via the I²C protocol. The byte consisting of the 7-bit address for the on-board chip is 0x90 (10010000) for a write command and is 0x91 (10010001) for a read command.
On power-up the Pmod enters into continuous conversion mode with both of the channels alternately reporting their data. It also uses the adaptive threshold mode where the output is active (high) only when the sensed capacitance is lower than the difference of the average measured capacitance and the sensitivity (a sensitivity of about 12 fF). Users can choose to either detect when the output of a channel crosses its threshold by “watching” its respective output pin on header J2 for a high voltage or can get more specific information by querying the device through the I²C interface.
Example continuous read with default settings
A communication transmission example taking advantage of continuous read capability and reporting the contents of the Status (address 0x00), most recent Channel 1 and Channel 2 data, and average Channel 1 and Channel 2 data registers, is shown below. The bit names are taken from the Analog Devices datasheet and are defined after the table showing the data acquisition sequence.
|Command byte||Address byte|
|Ch 1 Data High||Ch 1 Data Low¹|
|Ch 2 Data High||Ch 2 Data Low¹|
|Ch 1 Avg High||Ch 1 Avg Low¹|
|Ch 2 Avg High||Ch 2 Avg Low¹|
Note¹ The last four bits of each data set are not part of the 12-bit data conversion and so are either 0's or don't cares (X)
Note² The bits of the status register are defined in their own table (from the Analog Devices datasheet again) below:
|Status Register Bit Values|
|7||PwrDown||PwrDown = 1 indicates that the part is in a power-down|
|6||DacStep2||DacStep2 = 0 indicates that the Channel 2 CAPDAC value was changed after the last CDC conversion as part of the auto-DAC function. The bit value is updated after each finished CDC converion on this channel.|
|5||OUT2||OUT2 = 1 indicates that the Channel 2 data (CIN2 capacitance) crossed the threshold, according to the selected comparator mode of operation. The bit value is updated after each finished CDC conversion on this channel.|
|4||DacStep1||DacStep1 = 0 indicates that the Channel 1 CAPDAC value was changed after the last CDC conversion as part of the auto-DAC function. The bit value is updated after each finished CDC converion on this channel.|
|3||OUT1||OUT2 = 1 indicates that the Channel 1 data (CIN1 capacitance) crossed the threshold, according to the selected comparator mode of operation. The bit value is updated after each finished CDC conversion on this channel.|
|2||C1/C2||C1/C2 = 0 indicates that the last finished CDC conversion was on Channel 1. C1/C2 = 1 indicates that the last finished CDC conversion was on Channel 2.|
|1||RDY2||RDY2 = 0 indicates a finished CDC conversion on Channel 2. The bit is reset back to 1 when the Channel 2 data register is read via the serial interface or after a part reset or power-up.|
|0||RDY1||RDY1 = 0 indicates a finished CDC conversion on Channel 1. The bit is reset back to 1 when the Channel 1 data register is read via serial interface or after a part reset or power-up.|
Pinout Description Table
|Header J1||Header J2|
|1 & 5||SCL||Serial Clock||1||O1||Output of BTN1|
|2 & 6||SDA||Serial Data||2||O2||Output of BTN2|
|3 & 7||GND||Power Supply Ground|
|4 & 8||VCC||Power Supply (3.3V)|
Any external power applied to the Pmod CDC1 must be within 1.8V and 3.6V; it is recommended that Pmod is operated at 3.3V.
The pins on the main pin header are spaced 100 mil apart. The PCB is 2.3 inches long on the side parallel to the pins on the pin header and 0.8 inches long on the side perpendicular to the pin header.
The schematics of the Pmod CDC1 are available here. Additional information about the CDC including communication modes and specific timings of the chip can be found by checking out its datasheet here.
Example code demonstrating how to get information from the Pmod CDC1 can be found here.
If you have any questions or comments about the Pmod CDC1, feel free to post them under the appropriate section (“Add-on Boards”) of the Digilent Forum.