Simulating a Custom IP core using a Zynq processor


Prerequisites


Created in Vivado 2016.2 and SDK 2016.2

This demo is great for the Zedboard but is also applicable for any microblaze design. This tutorial simulates the custom IP core with a microblaze project to avoid the additional licenses associated with the ZYNQ BFM core and AXI BFM core. Unfortunately, this results in a significantly more complex setup for the simulation but provides a solution for simulation with built-in licenses for series-7 boards in Vivado.

We will be using the PWM core written in the Zedboard Creating Custom IP Cores Guide