PIC32 Interrupts

The following three examples of declaring a function to service a Timer 1 interrupt as an ISR are equivalent. Although method “a” is probably the simplest to write, methods “b” and “c” are provided because they may be used by other sources that the reader may encounter.

Using Interrupts

1. This method eliminates the requirement of a function prototype. The _ISR is a macro that is expanded by the compiler to method b below. This method saves some typing. (Section 11.3.3 of MPLAB® XC32 Compiler UG.)

void __ISR(_TIMER_1_VECTOR, ipl2) Timer1Handler(void) 
{
/* ISR code inserted here */
}

2. Using the attribute declaration (Section 11.3.1 XC32 Compiler UG).

void __attribute__( (interrupt(ipl2), 
vector(_TIMER_1_VECTOR))) Timer1Handler ( void );
 
void  Timer1Handler(void)
{
    /* ISR code inserted here */
}

3. Using a pragma declaration (no longer recommended!). Requires the vector number to be entered numerically.

#pragma interrupt Timer1Handler ipl2 vector 4
 
void  Timer1Handler(void)
{
            /* ISR code inserted here */
}

There are three methods for enabling Timer 1 interrupts. The first method is to use the following three C program statements that employ macro functions supplied by the peripheral library.

mT1SetIntPriority(p);       // Group priority: 1 <= p <= 7
mT1SetIntSubPriority(sp);   // Subgroup priority: 0 <= sp <= 3
mT1IntEnable();             // Enable T1 interrupts

The second method uses system three system functions from the peripheral library.

INTSetPriority(_TIMER_1_VECTOR, INT_PRIORITY_LEVEL_p); // 1 <= p <= 7
 
INTSetSubPriority(_TIMER_1_VECTOR, INT_SUB_PRIORITY_LEVEL_sp); 
                                                      // 0 <= sp <= 3
 
INTEnable(_TIMER_1_VECTOR, EN)  // EN = 1 for enable, 0 for disable

A second method uses a single statement that requires multiple bits to be defined in a configuration parameter, as shown below.

void ConfigIntTimerx(unsigned int config);// x = 0,1,2,3,4,5,23,45
config definitions

Timer interrupt priorities (these bit fields are mutually exclusive):

Tx_INT_PRIOR_7, Tx_INT_PRIOR_6, Tx_INT_PRIOR_5,
Tx_INT_PRIOR_4, Tx_INT_PRIOR_3, Tx_INT_PRIOR_2,
Tx_INT_PRIOR_1, Tx_INT_PRIOR_0

Timer interrupt sub- priorities (these bit fields are mutually exclusive):

Tx_INT_SUB_PRIOR_3, Tx_INT_SUB_PRIOR_2,
Tx_INT_SUB_PRIOR_1, Tx_INT_SUB_PRIOR_0