Subtractors

Subtracting circuits use two N-bit operands to produce an N-bit result and a borrow out signal. Subtractor circuits are rarely encountered in digital systems (for reasons that will be explained later), but they nevertheless provide an interesting design opportunity. Like adders, the simplest subtracting circuits perform subtraction bit-by-bit from the LSB to the MSB, and they are most easily designed using the bit-slice approach. The design process closely follows adder design, in that sample subtraction problems can be studied to gain insight into subtractor requirements, a truth table can be prepared based on the observations, and then a circuit can be designed from the truth table. Once a bit-slice subtractor circuit has been designed, it can be replicated N time to create an N-bit subtractor.

The full-subtractor circuit differs only slightly from the full-adder, in that the subtractor requires two inverters that are not needed by the adder. The full-subtractor can be used to build a “ripple borrow subtractor” that can subtract any two N-bit numbers, but RBS circuits suffer from the same slow operation as RCA circuits. Other, more efficient subtractor architectures are possible. But it is also possible to make a slight modification to an adder circuit, and then to use the modified adder as a subtractor. Following this method, if the number to be subtracted (the subtrahend) is made negative, then it can simply be added to the minuend (the minuend is number from which the subtrahend is to be subtracted). As an example, the operation '5 – 3' can be written as '5 + (-3)'. This, of course, requires a method of representing negative numbers in a digital circuit.

An adder circuit can easily be modified with a combinational logic circuit that can selectively implement the 2's compliment encoding of one of the input binary numbers. Recall that a two-input XOR gate can be used as a “controlled inverter”, where one of the inputs is passed through to the output either inverted or unchanged, based on the logic level of the second “control” input. If XOR gates are included on all bits of one of the operand inputs to an adder, then driving the XOR “control” input to a '1' will invert all bits. If that same control input is also connected to the Cin input to the adder, then a '1' is added to the inverted bits, which results in that input being converted to a 2's compliment-encoded number. Thus, the adder is summing a positive number with a negative number, which is the same as subtraction.

When designed from truth-tables and K-maps, a full subtractor is very similar to a full adder, but it contains two inverters that a full adder does not. When configured to subtract, an adder/subtractor circuit adds a single inverter (in the form of an XOR gate) to one input of a full adder module. A ripple borrow subtractor performs the same function as an adder/subtractor in subtract mode, but the two circuits are different as shown below. The differences can be explained by noting the carry-in to the LSB of the adder/subtractor must be set to a '1' to form the 2's complement coding of the operand, but it takes some thought to convince yourself. In the exercises, you are asked to demonstrate how the circuit structures of a ripple-carry adder circuit configured as a 2's compliment subtractor and a ripple- borrow subtractor perform identical functions.

• An adder circuit can easily be modified with a combinational logic circuit that can selectively implement the 2's compliment encoding of one of the input binary numbers.
• When designed from truth-tables and K-maps, a full subtractor is very similar to a full adder, but it contains two inverters that a full adder does not. When configured to subtract, an adder/subtractor circuit adds a single inverter (in the form of an XOR gate) to one input of a full adder module.